Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › MRAM architecture with a bit line located underneath the magnetic tunneling junction device

MRAM architecture with a bit line located underneath the magnetic tunneling junction device

US Patent 6982445 · Granted Jan 3, 2006

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and apparatus for facilitating communication between programmable logic c2015
Method and apparatus for specifying IP termination in a network element2011
Method and system for providing temperature dependent programming for magnetic m2006
Method and system for providing a programmable current source for a magnetic mem2005
Magnetic tunneling junction cell array with shared reference layer for MRAM appl2005
MRAM array with segmented word and bit lines2005
Method and system for providing a magnetic memory having a wrapped write line2005
MRAM memories utilizing magnetic write lines2005
MRAM architecture with a flux closed data storage layer2005
MRAM array with segmented magnetic write lines2005
Method and system for performing readout utilizing a self reference scheme2005
High density and high programming efficiency MRAM design2005