Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Delay locked-loop circuit for reducing load of variable delay unit at high-frequency operation and locking external clock signal stably

Delay locked-loop circuit for reducing load of variable delay unit at high-frequency operation and locking external clock signal stably

US Patent 6950488 · Granted Sep 27, 2005

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Pyrrolobenzodiazepine dimer prodrug and ligand-linker conjugate compound of the 2025
Semiconductor memory devices, memory systems including the same and methods of o2024
Antibody-drug conjugates comprising branched linkers and methods related thereto2024
Compositions and methods related to anti-CD19 antibody drug conjugates2023
Antibody-drug conjugate comprising antibody against human ROR1 and use for the s2023
Pyrrolobenzodiazepine dimer prodrug and ligand-linker conjugate compound of the 2023
Semiconductor memory devices, memory systems including the same and methods of o2023
Conjugates comprising self-immolative groups and methods related thereto2022
Semiconductor memory devices, memory systems including the same and methods of o2022
Antibody-drug conjugates comprising branched linkers and methods related thereto2021
Conjugates comprising peptide groups and methods related thereto2021
Memory module, memory device, and processing device having a processor mode, and2021