Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Hardware semaphores for a multi-processor system within a shared memory architecture

Hardware semaphores for a multi-processor system within a shared memory architecture

US Patent 6892258 · Granted May 10, 2005

Estimated economic value: $2,222,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multi-element sensor array calibration method2018
Method and apparatus providing synchronization and control for server-based mult2016
Method of measuring a crystallographic orientation of an object2016
Method and apparatus providing synchronization and control for server-based mult2015
Method and system for GNSS assistance data or LTO data download over a broadcast2014
Method and system for determining a position of a mobile communication device2012
Security supervisor governing allowed transactions on a system bus2007
Precise exit logic for removal of security overlay of instruction space2007
Scan and boundary scan disable mechanism on secure device2007
Programmable device and method of programming2007
Programmable device and method of programming2007
Frequency controller2006