Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Test structure for measuring a junction resistance in a DRAM memory cell array

Test structure for measuring a junction resistance in a DRAM memory cell array

US Patent 6856562 · Granted Feb 15, 2005

Estimated economic value: $74,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Filling device and method for manufacturing a filling device2016
Semiconductor wafer with test structure2008
Semiconductor wafer with test structure2008
Semiconductor product having a semiconductor substrate and a test structure and 2007
Semiconductor product having a semiconductor substrate and a test structure and 2007
Semiconductor product having a semiconductor substrate and a test structure and 2007
Test structure for a single-sided buried strap DRAM memory cell array2006
Test structure for a single-sided buried strap DRAM memory cell array2006
Integrated semiconductor circuit with an electrically programmable switching ele2006
Device architecture and process for improved vertical memory arrays2005
Device architecture and process for improved vertical memory arrays2005
Test structure for improved vertical memory arrays2005