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Home › Receiving a reset signal directly from an ATA or ATAPI bus of a host computer without passing through an interface processing unit for termination of a half halted state

Receiving a reset signal directly from an ATA or ATAPI bus of a host computer without passing through an interface processing unit for termination of a half halted state

US Patent 6832276 · Granted Dec 14, 2004

Estimated economic value: $625,000 ⓘ

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