Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Flush memory having source and drain edges in contact with the stacked gate structure

Flush memory having source and drain edges in contact with the stacked gate structure

US Patent 6770925 · Granted Aug 3, 2004

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor device and method for manufacturing the same2025
Semiconductor device2024
Integrated circuit, memory device and method of manufacturing the same2024
Semiconductor device and method for manufacturing the same2024
Device and method for operating the same2023
Embedded memory using SOI structures and methods2023
Semiconductor isolation structure and method for making the semiconductor isolat2022
Semiconductor device and method for fabricating the same2022
Camera module and electronic equipment using the camera module2021
Embedded memory using SOI structures and methods2021
Memory device and method for programming the same2020
Embedded memory using SOI structures and methods2020