Assignee
Inventors
- Jim Butler (11 patents)
- Raul Oteyza (8 patents)
{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Phase-locked loop (PLL) circuit for selectively correcting clock skew in different modes", "item": "https://www.patentleaderboard.com/patent/6647081"}]}
Skip to contentUS Patent 6647081 · Granted Nov 11, 2003