{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Method and system for reducing power in a parallel-architecture multiplier", "item": "https://www.patentleaderboard.com/patent/6611857"}]}
Skip to content