Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatus and method for implementing fault resilient booting in a multi-processor system by using a flush command to control resetting of the processors and isolating failed processors

Apparatus and method for implementing fault resilient booting in a multi-processor system by using a flush command to control resetting of the processors and isolating failed processors

US Patent 6601165 · Granted Jul 29, 2003

Estimated economic value: $17,580,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Zoned namespace with zone grouping2024
Techniques for an efficient fabric attached memory2023
Zoned namespace with zone grouping2023
Techniques for an efficient fabric attached memory2021
Input/output direct memory access during live memory relocation2021
Hardware accelerated data processing operations for storage data2021
Host defined bandwidth allocation for SSD tasks2021
Integration of a virtualized input/output device in a computer system2020
Separation of control and data plane functions in SoC virtualized I/O device2020
Separation of control and data plane functions in SoC virtualized I/O device2020
Input/output direct memory access during live memory relocation2020
Aggregation of interrupts using event queues2019