Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Semiconductor package with a controlled impedance bus and method of forming same

Semiconductor package with a controlled impedance bus and method of forming same

US Patent 6583035 · Granted Jun 24, 2003

Estimated economic value: $17,417,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Laminated interposers and packages with embedded trace interconnects2020
Laminated interposers and packages with embedded trace interconnects2019
Electronic assemblies without solder having overlapping components2012
Integrated circuit device having stacked dies and impedance balanced transmissio2012
Chip socket assembly and chip file assembly for semiconductor chips2012
Semiconductor package with a controlled impedance bus and method of forming same2011
Semiconductor package with a controlled impedance bus and method of forming same2011
Method and apparatus for transmitting data with reduced coupling noise2011
Semiconductor package with a controlled impedance bus2009
Semiconductor package with a controlled impedance bus2009
Method and apparatus for transmitting data with reduced coupling noise2009
Expandable slave device system with buffered subsystems2009