{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Demultiplexing and clock-recovery circuit", "item": "https://www.patentleaderboard.com/patent/6556323"}]}
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Home › Demultiplexing and clock-recovery circuit

Demultiplexing and clock-recovery circuit

US Patent 6556323 · Granted Apr 29, 2003

Estimated economic value: $21,783,000 ⓘ

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