Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multiple processor interface, synchronization, and arbitration scheme using time multiplexed shared memory for real time systems

Multiple processor interface, synchronization, and arbitration scheme using time multiplexed shared memory for real time systems

US Patent 6473821 · Granted Oct 29, 2002

Estimated economic value: $2,396,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Wearable sound device2024
Methods and structure for accounting for connection resets between peripheral co2015
High speed USB hub with full speed to high speed transaction translator2014
Method and apparatus for distributing content across platforms in a regulated ma2013
USB hub apparatus supporting multiple high speed devices and a single super spee2012
Sparse-coefficient functions for reducing computational requirements2006
Component selector assembly2002
Digital signal processing architecture for multi-band radio receiver2001
Digital signal processing architecture for multi-band radio receiver2001
Digital processing radio receiver with adaptive bandwidth control2001
Digital processing radio receiver with adaptive bandwidth control2001
Dither noise source with notched frequency spectrum2001