Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Data processor having memory access unit with predetermined number of instruction cycles between activation and initial data transfer

Data processor having memory access unit with predetermined number of instruction cycles between activation and initial data transfer

US Patent 6338137 · Granted Jan 8, 2002

Estimated economic value: $174,442,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Packet header field extraction2025
Configuring a switch for extracting packet header fields2025
Expansion of packet data within processing pipeline2025
Algorithmic TCAM based ternary lookup2025
Packet header field extraction2024
Resilient hashing for forwarding packets2023
Expansion of packet data within processing pipeline2023
Algorithmic TCAM based ternary lookup2023
Forwarding element data plane performing floating point computations2023
Forwarding element data plane with computing parameter distributor2023
Stateful processing unit with min/max capability2022
Forwarding element data plane with computing parameter distributor2022