Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory cell integrated structure with corresponding biasing device

Memory cell integrated structure with corresponding biasing device

US Patent 6304490 · Granted Oct 16, 2001

Estimated economic value: $44,218,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Phase-change memory including phase-change elements in series with respective he2024
Phase change memory device and method of programming a phase change memory devic2022
Performing wear leveling operations in a memory based on block cycles and use of2022
Integrated semiconductor device and process for manufacturing an integrated semi2021
Apparatuses and methods for providing data to a configurable storage area2020
Microelectromechanical device, which can be used as non-volatile memory module o2020
Non-volatile memory device, in particular phase change memory, and reading metho2020
Microelectromechanical device, which can be used as non-volatile memory module o2019
Apparatuses and methods for performing write count threshold wear leveling opera2019
Circuit and method for reading a memory cell of a non-volatile memory device2019
Apparatuses and methods for providing data to a configurable storage area2019
Memory device with progressive row reading and related reading method2018