Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for fabricating a semiconductor component having a low contact resistance with respect to heavily doped zones

Method for fabricating a semiconductor component having a low contact resistance with respect to heavily doped zones

US Patent 6232220 · Granted May 15, 2001

Estimated economic value: $3,167,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Composite cascode power amplifiers for envelope tracking applications2025
Composite cascode power amplifiers for envelope tracking applications2023
Semiconductor packages, and methods for forming semiconductor packages2023
Magnetic coils in locally thinned silicon bridges and methods of assembling same2022
Integrated circuit devices with front-end metal structures2022
Lead frame with angular deflections and wrapped printed wiring boards for system2021
Contoured-on-heat-sink, wrapped printed wiring boards for system-in-package appa2021
Monolithic silicon bridge stack including a hybrid baseband die supporting proce2021
Semiconductor devices, and a method for forming a semiconductor device2020
Monolithic silicon bridge stack including a hybrid baseband die supporting proce2019
Microelectromechanical system (MEMS) on application specific integrated circuit 2019
Microelectromechanical system (MEMS) on application specific integrated circuit 2018