Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Merged memory-logic semiconductor device having a built-in self test circuit

Merged memory-logic semiconductor device having a built-in self test circuit

US Patent 6226211 · Granted May 1, 2001

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Optical navigation device and method for compensating for offset in optical navi2012
Pointing device and motion value calculating method thereof2012
Optical navigation device and method of operating the same2011
Optical pointing device2010
Image sensor and optical pointing system2010
Navigation system and navigation method2009
Optical pointing system and method for controlling a sampling rate and a maximum2007
Cache memory capable of selecting size thereof and processor chip having the sam2005
Multi-way set associative cache memory2005
Merged memory and logic (MML) integrated circuits including built-in test circui2000
Method and apparatus for drawing graphics in a graphics controller of a multimed1999