Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › On-chip error detection and correction system for an embedded non-volatile memory array and method of operation

On-chip error detection and correction system for an embedded non-volatile memory array and method of operation

US Patent 6216251 · Granted Apr 10, 2001

Estimated economic value: $17,711,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and apparatus for managing memory2004
Co-processor for performing modular multiplication2001