Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Graphic representation of circuit analysis for circuit design and timing performance evaluation

Graphic representation of circuit analysis for circuit design and timing performance evaluation

US Patent 6212666 · Granted Apr 3, 2001

Estimated economic value: $19,522,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems and methods for customizing a portfolio using visualization and control 2020
Simultaneous placement of large and small cells in an electronic circuit2006
Placing cells of an IC design using partition preconditioning2005
Constrained optimization with linear constraints to remove overlap among cells o2005
Multiple pass optimization for automatic electronic circuit placement2004
Non-linear optimization system and method for wire length and delay optimization2003
Quick placement of electronic circuits using orthogonal one dimensional placemen2003
Non-linear optimization system and method for wire length and density within an 2003
Non-linear optimization system and method for wire length and delay optimization2001
Non-linear optimization system and method for wire length and density within an 2001
Template formation method and apparatus2000
Image detection system1999