Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Semiconductor topography employing a shallow trench isolation structure with an improved trench edge

Semiconductor topography employing a shallow trench isolation structure with an improved trench edge

US Patent 6165906 · Granted Dec 26, 2000

Estimated economic value: $2,711,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Stretchable electronic material and devices2022
Collection cup with a telescopic handle2015
Formation of FinFET gate spacer2013
Methods for fabricating FinFET semiconductor devices using planarized spacers2012
Formation of FinFET gate spacer2012
Method for fabricating a semiconductor device having a semiconductive resistor s2011
Use of scanning theme implanters and annealers for selective implantation and an2009
Portable vaporizer for plant material2008
Method for forming a semiconductor arrangement with gate sidewall spacers of spe2007
Method for semiconductor gate line dimension reduction2007
Method of forming a semiconductor arrangement with reduced field-to active step 2007
Advanced process control of thermal oxidation processes, and systems for accompl2007