Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for reliable system shutdown after coherency corruption

System and method for reliable system shutdown after coherency corruption

US Patent 6073216 · Granted Jun 6, 2000

Estimated economic value: $186,775,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Integrated circuit layout wiring for multi-core chips2020
Channel-less integrated circuit layout wiring for chips including a plurality of2020
Integrated circuit layout wiring for multi-core chips2018
Integrated circuit layout wiring for multi-core chips2018
System and method for terminating lock-step sequences in a multiprocessor system2004
System and method for terminating lock-step sequences in a multiprocessor system2003
Bank information pre-decode apparatus2003
Method for preventing deadlock by suspending operation of processors, bridges, a2001
Method for preventing deadlock by suspending operation of processors, bridges, a2001
Method and apparatus of arbitrating requests to a multi-banked memory using bank2001
System and method for improved transfer of data between multiple processors and 2000
Microporous tubular prosthesis2000