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Home › Integrated circuit SCSI I/O cell having signal assertion edge triggered timed glitch filter that defines a strobe masking period to protect the contents of data latches

Integrated circuit SCSI I/O cell having signal assertion edge triggered timed glitch filter that defines a strobe masking period to protect the contents of data latches

US Patent 6055587 · Granted Apr 25, 2000

Estimated economic value: $41,165,000 ⓘ

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