Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › High-speed binary synchronous counter with precomputation of carry-independent terms

High-speed binary synchronous counter with precomputation of carry-independent terms

US Patent 5946369 · Granted Aug 31, 1999

Estimated economic value: $60,855,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Power consumption optimization of wireless communication systems for content del2019
Versatile protected input/output device access and isolated servicing for virtua2017
Method, apparatus, system for representing, specifying and using deadlines2017
BTSC pilot signal lock2010
Integrated circuit BTSC encoder2009
Mechanism for using the allpass decomposition architecture for the cauer low pas2009
Accessing data from different memory locations in the same cycle2009
Scalable traceback technique for channel decoder2009
BTSC pilot signal lock2008
Virtualized load buffers2008
Mechanism for using clamping and offset techniques to adjust the spectral and wi2007
Method for extending the local memory address space of a processor2007