Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for forming interconnections in an integrated circuit

Method for forming interconnections in an integrated circuit

US Patent 5851919 · Granted Dec 22, 1998

Estimated economic value: $17,927,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Electrically programmable memory cell2003
Method of making MOS transistor with high doping gradient under the gate2002
Method of making an electrically programmable memory cell2001
Remanent memory device2001
Bus control buffer amplifier2000
Method of forming interconnections in an integrated circuit2000
MOS memory point2000
Electrically programmable memory cell1999
Electrically programmable memory cell1998
Electrically programmable memory cell1997