Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › I/O driver design for simultaneous switching noise minimization and ESD performance enhancement

I/O driver design for simultaneous switching noise minimization and ESD performance enhancement

US Patent 5843813 · Granted Dec 1, 1998

Estimated economic value: $6,005,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Mixed halide scintillators radiation detection2021
Mixed halide scintillators for radiation detection2019
Intrinsic complex halide elpasolite scintillators and methods of making and usin2017
Dual-height cell with variable width power rail architecture2006
Method and system for area efficient charge-based capacitance measurement2006
Dual-height cell with variable width power rail architecture2005
Gate array architecture using elevated metal levels for customization2003
Process monitor with statistically selected ring oscillator2003
Method and apparatus for indentifying causes of poor silicon-to-simulation corre2002
Layout architecture for core I/O buffer2000
Programmable polysilicon gate array base cell architecture1999
Electrostatic discharge (ESD) structure and buffer driver structure for providin1998