Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Process for fabricating a high voltage MOS transistor for flash EEPROM applications having a uni-sided lightly doped drain

Process for fabricating a high voltage MOS transistor for flash EEPROM applications having a uni-sided lightly doped drain

US Patent 5668034 · Granted Sep 16, 1997

Estimated economic value: $105,296,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Charging sensor method and apparatus2005
Arrangements to reduce charging damage in structures of integrated circuits2003
Arrangements to reduce charging damage in structures of integrated circuits usin2003
Arrangements to reduce charging damage in structures of integrated circuits2002
High voltage MOS transistor for flash EEPROM applications having a uni-sided lig2000
High voltage MOS transistor for flash EEPROM applications having a uni-sided lig2000
Method of fabricating a high voltage MOS transistor for flash EEPROM application1996
Method of fabricating a high voltage MOS transistor for flash EEPROM application1996
Fabrication of interpoly dielctric for EPROM-related technologies1992