Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Semiconductor memory device having plural memory mats with centrally located reserve bit or word lines

Semiconductor memory device having plural memory mats with centrally located reserve bit or word lines

US Patent 5615156 · Granted Mar 25, 1997

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Work machine2025
Pneumatic tire2025
Circuitry borrowing for memory arrays2025
Hollow fiber membrane module2025
Alignment processing device and manufacturing method of liquid crystal optical e2025
Liquid crystal element2025
Liquid crystal optical element and method for manufacturing the same2024
Grease composition for speed reducer part of on-vehicle electric component2024
Substrate transferring robot and method of controlling the substrate transferrin2024
Liquid crystal optical element and method for manufacturing the same2024
Pneumatic tire2024
Liquid crystal element2024