Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for managing timing requirement specifications and confirmations and generating timing models and constraints for a VLSI circuit

Method and apparatus for managing timing requirement specifications and confirmations and generating timing models and constraints for a VLSI circuit

US Patent 5581473 · Granted Dec 3, 1996

Estimated economic value: $26,345,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Photonic structure and method for manufacturing the same2025
Optical power splitter and method of manufacturing the same2025
Calibration system for wavelength-division multiplexing, wavelength-division mul2025
Low-power flip flop circuit2025
Integrated circuit, system for and method of forming an integrated circuit2025
Method and system for latch-up prevention2025
Flip flop circuit2025
Flip flop circuit2025
Vertical grating filters for photonics2025
Methods of resistance and capacitance reduction to circuit output nodes2025
Semiconductor device, photonic circuit and method for adjusting resonant wavelen2025
Method of measuring electro-optic characteristic of a traveling wave mach-zehnde2025