Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory configuration decoding system having automatic row base address generation mechanism for variable memory devices with row access interleaving

Memory configuration decoding system having automatic row base address generation mechanism for variable memory devices with row access interleaving

US Patent 5572692 · Granted Nov 5, 1996

Estimated economic value: $57,895,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Integrated circuit socket2012
Circuit board with notched stiffener frame2012
Semiconductor chip with solder joint protection ring2011
Integrated circuit package lid with a wetting film2009
Reduction of damage to thermal interface material due to asymmetrical load2009
Method of integrated circuit packaging2009
Apparatus and method to vertically route and connect multiple optical fibers2005
Organic packages having low tin solder connections2004
Controlled and programmed deposition of flux on a flip-chip die by spraying2004
Apparatus and method to metallize, reinforce, and hermetically seal multiple opt2003
Method of reflowing organic packages using no-clean flux2003
Boat for organic and ceramic flip chip package assembly2002