Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › High speed mask and logical combination operations for parallel processor units

High speed mask and logical combination operations for parallel processor units

US Patent 5499376 · Granted Mar 12, 1996

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Infinite key memory transaction unit2014
File system for storing multiple files as a single compressed file2010
Automatic time warp for electronic system simulation2009
Automatic time warp for electronic system simulation2009
Sourcing internal signals to output pins of an integrated circuit through sequen2009
Computer memory system having programmable operational characteristics based on 1999
Filter press1999
Method and apparatus for interactively displaying signal information during comp1998
Method and apparatus for interactively displaying signal information during comp1998
High speed, direct register access operation for parallel processing units1998
High speed, direct register access operation for parallel processing units1998
Method of operation and apparatus for optimizing execution of short instruction 1998