Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Tie-up and tie-down circuits with a primary input for testability improvement of logic networks

Tie-up and tie-down circuits with a primary input for testability improvement of logic networks

US Patent 5444391 · Granted Aug 22, 1995

Estimated economic value: $10,740,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method for printing a plurality of drops at high speed2025
Method and device for maintaining a nozzle print head2023
Method for optimizing a printing speed of a CIJ printer, in particular for print2023
Method and device for maintaining a nozzle print head2022
Structural motor vehicle axle system assembled by structural bonding2011