Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Bus interface synchronization circuitry for reducing time between successive data transmission in a system using an asynchronous handshaking

Bus interface synchronization circuitry for reducing time between successive data transmission in a system using an asynchronous handshaking

US Patent 5276807 · Granted Jan 4, 1994

Estimated economic value: $1,111,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Network device using cache techniques to process control signals2024
Digital camera with multiple pipeline signal processors2018
Digital camera with multiple pipeline signal processors2016
Digital camera with multiple pipeline signal processors2014
Digital camera with multiple pipeline signal processors2013
Remote direct memory access for iSCSI2012
Digital camera with multiple pipeline signal processors2011
Network receive interface for high bandwidth hardware-accelerated packet process2011
Camera and method having optics and photo detectors which are adjustable with re2010
Digital camera with integrated ultraviolet (UV) response2010
Digital camera with integrated infrared (IR) response2009
Systems and methods of directly placing data in an iSCSI storage device2009