Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for forming filled holes in multi-layer integrated circuit packages

Method for forming filled holes in multi-layer integrated circuit packages

US Patent 5242641 · Granted Sep 7, 1993

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Apparatus for making laminated electrical and electronic devices1999
Apparatus for making laminated electrical and electronic devices1999
Method and apparatus for manufacturing pre-terminated chips1999
Method and apparatus for manufacturing pre-terminated chips1999
Apparatus and method for making laminated electrical or electronic devices from 1998
Apparatus and method for making laminated electrical or electronic devices from 1998
Method of forming holes in unfired ceramic layers of integrated circuit packages1992
Method of forming holes in unfired ceramic layers of integrated circuit packages1992
Isostatic press for laminating multi-layer components and method of lamination1991
Isostatic press for laminating multi-layer components and method of lamination1991
Tarpaulin securing assembly1988