Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Processor controlled command port architecture for flash memory

Processor controlled command port architecture for flash memory

US Patent 5222046 · Granted Jun 22, 1993

Estimated economic value: $37,021,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Superblock-based write management in non-volatile memory devices2025
Superblock size management in non-volatile memory devices2024
Page buffer enhancements2024
SSD architecture supporting low latency operation2024
Superblock-based write management in non-volatile memory devices2024
Systems, methods, and non-transitory computer-readable media for thin provisioni2024
Systems and methods for managing reduced power failure energy requirements on a 2023
Page buffer enhancements2023
Explicit buffer control2023
Media error reporting improvements for storage drives2022
SSD architecture supporting low latency operation2022
Systems and methods for managing reduced power failure energy requirements on a 2021