Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System for testing internal nodes in receive and transmit FIFO's

System for testing internal nodes in receive and transmit FIFO's

US Patent 5153509 · Granted Oct 6, 1992

Estimated economic value: $3,365,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and apparatus for digital I/O expander chip with multi-function timer cel2014
Method and apparatus for digital I/O expander chip with multi-function timer cel2011
Virtual tags and the process of virtual tagging2010
Virtual tags and the process of virtual tagging utilizing user feedback in trans2006
Controller for ATAPI mode operation and ATAPI driven universal serial bus mode o2003
Telephone system using recorded messages to make outbound announcements2000
System for the automatic transfer of message status in digital data communicatio1997
Technique for eliminating data transmit memory underruns1997
Technique for automatically adapting a peripheral integrated circuit for operati1996
Integrated microprocessor unit generating separate memory and input-output devic1995
System with devices connected in sequence to receive information in a predetermi1993
Device and method for programming critical hardware parameters1993