Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatus and method for reducing interference in two-level cache memories

Apparatus and method for reducing interference in two-level cache memories

US Patent 5136700 · Granted Aug 4, 1992

Estimated economic value: $6,375,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Data center network using circuit switching2016
Electromagnetic 3D stylus2015
Optical tablet stylus and indoor navigation system2014
Universal stylus device2013
Subscription-based computing implemented in hardware of computing device2011
Deterring theft and unauthorized use of electronic devices through the use of co2009
System and method for accepting disparate types of user input2008
Organizing, editing, and rendering digital ink2008
Two-button mouse input using a stylus2008
Electromagnetic digitizer sensor array2007
Organizing, editing, and rendering digital ink2007
Organizing, editing, and rendering digital ink2006