Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › VLSI architecture for a Reed-Solomon decoder

VLSI architecture for a Reed-Solomon decoder

US Patent 5130990 · Granted Jul 14, 1992

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

VLSI single-chip (255,223) Reed-Solomon encoder with interleaver1990
VLSI single-chip (255,223) Reed-Solomon encoder with interleaver1990
Architecture for time or transform domain decoding of reed-solomon codes1989
Architecture for time or transform domain decoding of reed-solomon codes1989
VLSI binary updown counter1989
VLSI binary updown counter1989