Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for fabricating an integrated bipolar-CMOS circuit isolation for providing different backgate and substrate bias

Method for fabricating an integrated bipolar-CMOS circuit isolation for providing different backgate and substrate bias

US Patent 5087579 · Granted Feb 11, 1992

Estimated economic value: $3,189,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Initialization method for an entertainment and communications network2005
Digital multi-room, multi-source entertainment and communications network2005
Low side line driver1998
Method and apparatus for transmission line termination1995
Integrated bipolar-CMOS circuit isolation for providing different backgate and s1991
Time reference signal generation system1991
Integrated bipolar-CMOS circuit isolation process for providing different backga1990
Integrated bipolar-CMOS circuit isolation for providing different backgate and s1989