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Home › Digital phase locked loop utilizing a multi-bit phase error input for control of a stepped clock generator

Digital phase locked loop utilizing a multi-bit phase error input for control of a stepped clock generator

US Patent 5056054 · Granted Oct 8, 1991

Estimated economic value: $1,168,000 ⓘ

Assignee

National Semiconductor

Inventors

Hee Wong (57 patents)
Howard Allen Wilson (42 patents)
Jesus Guinea (15 patents)

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