Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Programmable logic device with array blocks with programmable clocking

Programmable logic device with array blocks with programmable clocking

US Patent 4912342 · Granted Mar 27, 1990

Estimated economic value: $2,207,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Programming nonvolatile memory cells through a series of predetermined threshold2021
Programming nonvolatile memory cells through a series of predetermined threshold2021
Programming nonvolatile memory cells through a series of predetermined threshold2021
Adaptive parallel writing to nonvolatile memory cells2020
Programming nonvolatile memory cells through a series of predetermined threshold2019
Programming nonvolatile memory cells using resolution-based and level-based volt2019
Parallel programming of nonvolatile memory cells2017
Reading a multi-bit value from a memory cell2016
Electronic x-ray camera with spectral resolution2016
High voltage generation and control in source-side injection programming of non-2013
Parallel programming of multiple-bit-per-cell memory cells by controlling progra2011
High voltage generation and control in source-side injection programming of non-2011