Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Low top gate resistance JFET structure

Low top gate resistance JFET structure

US Patent 4876579 · Granted Oct 24, 1989

Estimated economic value: $6,285,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

System and method for providing a full fail-safe capability in signal transmissi2016
PMOS depletable drain extension made from NMOS dual depletable drain extensions2015
Base for a NPN bipolar transistor2015
System and method for providing a full fail-safe capability in signal transmissi2015
Method of manufacturing a MOSFET structure2014
Method of manufacturing a MOSFET structure2014
PMOS depletable drain extension made from NMOS dual depletable drain extensions2013
Bipolar method and structure having improved BVCEO/RCS trade-off made with deple2013
Integrated process for thin film resistors with silicides2012
Bipolar method and structure having improved BVCEO/RCS trade-off made with deple2011
Depletable cathode low charge storage diode2011
PMOS depletable drain extension made from NMOS dual depletable drain extensions2010