Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Integrated CMOS circuit comprising a substrate bias voltage generator

Integrated CMOS circuit comprising a substrate bias voltage generator

US Patent 4820936 · Granted Apr 11, 1989

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Integrated circuit having dynamic memory with boosted plateline2001
Semi-conductor device with a memory cell1999
Charge-coupled device having reduced cross-talk1994
Flip-flop circuit having transfer gate delay1993
Integrated CMOS gate-array circuit1993
Master slice CMOS array having complementary columns1991
Charge-coupled device1991
Semiconductor memory with voltage stabilization1991
Multi-mode memory device1990
Multi-mode memory device1990
Logic circuits with data resynchronization1990
Charge-coupled device1989