Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Systematic memory error detection and correction apparatus and method

Systematic memory error detection and correction apparatus and method

US Patent 4506362 · Granted Mar 19, 1985

Estimated economic value: $4,142,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Seismic gun assembly for shooting into a bore hole2012
Seismic gun assembly for shooting into a bore hole2012
Machine control over the web2004
Personal identification system using multiple parameters having low cross-correl2001
Parallel processor cell computer system1995
Realtime systolic, multiple-instruction, single-data parallel computer system1992
Printed circuit board heat sink1990
Parallel process controller1987
Digital computer with multi-processor capability utilizing intelligent composite1981
Programmable sequence controller with drum emulation and improved power-down pow1980