Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Data processing system having interlinked fast and slow memory means and interlinked program counters

Data processing system having interlinked fast and slow memory means and interlinked program counters

US Patent 4484261 · Granted Nov 20, 1984

Estimated economic value: $3,457,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Apparatus and method for teaching1994
Inductive coupled object identification system and method1992
Learning aid or game having miniature electronic speech synthesis chip1990
Electronic handheld translator having miniature electronic speech synthesis chip1986
Data processing system with multiple memories and program counter1986
Variable frame length data converter for a speech synthesis circuit1984
Speech synthesis system with parameter look up table1984
Data processing system integrated circuit having modular memory add-on capacity1984
Data processing system having interlinked slow and fast memory means1984
Address decode system1983
System and method of driving a multiplexed liquid crystal display by varying the1983
Method and apparatus for speech synthesis filter excitation1982