Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › DRAM cache with stacked, heterogenous tag and data dies

DRAM cache with stacked, heterogenous tag and data dies

US Patent 12455824 · Granted Oct 28, 2025

Assignee

No assignee recorded.

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Memory module with memory-ownership exchange2025
Memory device having hidden refresh2025
Memory device having hidden refresh2025
Buffer device with low-latency skid mode for data freshness2025
Buffer device with low-latency skid mode for data freshness2025
Flexible metadata allocation and caching2025
Multi-modal refresh of dynamic, random-access memory2025
Multi-modal refresh of dynamic, random-access memory2025
Quad-channel DRAM2025
System application of DRAM component with cache mode2025
Methods and circuits for aggregating processing units and dynamically allocating2025
Stacked device communication2025