Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory devices and systems with parallel impedance adjustment circuitry and methods for operating the same

Memory devices and systems with parallel impedance adjustment circuitry and methods for operating the same

US Patent 12380052 · Granted Aug 5, 2025

Assignee

No assignee recorded.

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Map merging method for electronic apparatus2025
Automated error correction with memory refresh2025
Write timing compensation2025
Asymmetric read-write sequence for interconnected dies2025
Bank-level self-refresh2025
Bus training with interconnected dice2025
Bus training with interconnected dice2025
Adaptive memory registers2025
Programmable memory timing2024
Multi-rail power transition2024
Multiple error correction code (ECC) engines and ECC schemes2024
Equalization for pulse-amplitude modulation2024