Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Data receiver design in DDR memory interfaces

Data receiver design in DDR memory interfaces

US Patent 12354665 · Granted Jul 8, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Supporting mixed read in non-volatile memory controller2025
Bypass buffer for worn out codewords2025
Heterophasic propylene copolymer composition with low gloss2025
Data storage device and method for hiding tweak generation latency2025
Non-volatile cross-bar memory with on-chip processing circuitry2025
Mesh network-on-a-chip (NOC) with heterogeneous routers2025
Memory controller support for mixed read2025
Memory controller with common request buffer2025
Polymer composition with a high heat deflection temperature2025
Process for producing glass fiber-reinforced composition2025
Current reference circuit with process, voltage, and wide-range temperature comp2025
Current reference circuit with process, voltage, and wide-range temperature comp2025