Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Bit flipping decoder with optimized maximum iterations for varied bit flipping thresholds

Bit flipping decoder with optimized maximum iterations for varied bit flipping thresholds

US Patent 12321613 · Granted Jun 3, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Classification of error rate of data retrieved from memory cells2025
Memory device producing metadata characterizing applied read voltage level with 2025
Iterative bit flip decoding utilizing different bit flip states2025
Error decoding with soft redundant array of independent NAND (RAIN)2025
Error decoding with soft redundant array of independent NAND (RAIN)2025
Search for an optimized read voltage2025
Syndrome decoding system2025
Managing compensation for charge coupling and lateral migration in memory device2025
Managing compensation for charge coupling and lateral migration in memory device2025
Voltage bin calibration based on a voltage distribution reference voltage2025
Voltage bin calibration based on a voltage distribution reference voltage2025
Validating read level voltage in memory devices2025