Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Recording a memory value trace for use with a separate cache coherency protocol trace

Recording a memory value trace for use with a separate cache coherency protocol trace

US Patent 12242383 · Granted Mar 4, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Processor support for using cache way-locking to simultaneously record plural ex2025
Treating main memory as a collection of tagged cache lines for trace logging2025
Physical memory address omission or obfuscation within an execution trace2025
Logging cache line lifetime hints when recording bit-accurate trace2025
Recording a cache coherency protocol trace for use with a separate memory value 2025
Memory address compression within an execution trace2025
Memory page markings as logging cues for processor-based execution tracing2024
Cross-thread memory indexing in time-travel debugging traces2024
Using entropy to prevent inclusion of payload data in code execution log data2024
Automated root cause identification using data flow analysis of plural execution2024
Cache-based tracing for time travel debugging and analysis2024
Physical memory address omission or obfuscation within an execution trace2024