Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for performing power disturbing operation to reduce success rate of cryptosystem power analysis attack, cryptosystem processing circuit, and electronic device

Method for performing power disturbing operation to reduce success rate of cryptosystem power analysis attack, cryptosystem processing circuit, and electronic device

US Patent 12231530 · Granted Feb 18, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Zinc aluminum silicate/granular red mud composite material of Zn2+-modified indu2025
Method of defense against cryptosystem timing attack, associated cryptosystem pr2025
Device and method for handling programming language function2024
Joint test action group transmission system capable of transmitting data continu2024
Methods for controlling asynchronous FIFO memory and data transmission system ut2024
Device and method for handling programming language function2023
Data storage system capable of performing interleaving scatter transmissions or 2022
Data transmission system capable of perform union task with a plurality of chann2022
Scheme applied in JTAG TAP apparatus, JTAG host, and target system capable of ac2022
Method for filling aerosol generating product and prepared aerosol generating pr2022
Data transmission system capable of transmitting a great amount of data2021
Test access port circuit capable of increasing transmission throughput2021