Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multi-layered moiré targets and methods for using the same in measuring misregistration of semiconductor devices

Multi-layered moiré targets and methods for using the same in measuring misregistration of semiconductor devices

US Patent 12204254 · Granted Jan 21, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Robust and accurate overlay target design for CMP2025
Robust and accurate overlay target design for CMP2025
Single cell in-die metrology targets and measurement methods2025
Predicting tool induced shift using Moiré overlay targets2025
Method for measuring and correcting misregistration between layers in a semicond2025
Imaging overlay targets using moiré elements and rotational symmetry arrangement2024
Imaging overlay targets using moiré elements and rotational symmetry arrangement2024
Measurement of stitching error using split targets2024
Measurement of stitching error using split targets2024
Overlay mark design for electron beam overlay2024
Overlay mark design for electron beam overlay2024
Reduction or elimination of pattern placement error in metrology measurements2024